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Meta Hardware Systems Engineer, Silicon in Menlo Park, California

Summary:

Meta is seeking an Engineer to join our Release to Production (RTP) team. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure operates efficiently to deliver our innovative services. The RTP team is responsible for the Hardware Lifecycle of all Meta servers including pre-production hands-on system and hardware debugging and stress testing, enabling production-ready system monitoring, automated provisioning and automated remediation of issues.RTP Engineers work closely with hardware designers, system manufacturers, component vendors, capacity engineering, production engineering, Meta services, and data center operations teams to test systems before release to our production data centers, and to track the health and lifecycle of servers in production.The RTP Silicon squad’s primary charter is to deliver scalable and reliable custom ASIC solutions to meet Meta data center needs. Ramping to production and solving the datacenter scaling and deployment challenges requires us to take a systems based approach to Silicon bring up and validation.

Required Skills:

Hardware Systems Engineer, Silicon Responsibilities:

  1. Working with end users to understand system use cases to help guide validation.

  2. Ensuring a tight loops between hardware qualification and the final application use models

  3. We focus on volume as well as the velocity of qualifications to allow the fastest possible ramp to production.

  4. The team works on all aspects of silicon productization, from early architecture and design inputs, to pre-silicon validation, to bring-up and post-silicon characterization.

  5. The team's early engagement with the design team ensures that quality and debuggability are built into the design.

  6. We support the architecture team with insights from performance & power characterization to guide future improvements.

  7. We work directly with the verification team to enable a comprehensive pre and post silicon test plan.

  8. We write tests, create bare metal operating systems, enable frameworks that will allow us to reuse and scale testing from pre-silicon platforms to many ASICs in the lab during the post silicon phase.

  9. We work on extensive functional and electrical characterization over temperature, process corner and voltage.

  10. To accomplish this at scale, we build and maintain extensive lab automation.

Minimum Qualifications:

Minimum Qualifications:

  1. BS or advanced degree in Electrical Engineering, Computer Engineering, Computer Science, Engineering, Math, Physics or a related field or equivalent experience

  2. 7+ years of experience in hands-on SW/FW/HW engineering to build systems/products for datacenter environments, consumer devices/HW, or similar

  3. 7+ years of experience with proven troubleshooting analytics of server/systems architecture and components

  4. 5+ years of experience in developing test specifications, procedures, and debug guides for test solutions.

  5. 5+ years of experience with some of the following modules/domains: PCIe, Networking, Flash, Memory, CPU, GPU, DRAM (DDR4/5 or HBM)

  6. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

Preferred Qualifications:

Preferred Qualifications:

  1. 5+ years of experience in ASIC Design, Development or Validation (Silicon bringup, validation, emulation, characterization)

  2. Experienced in the integration of lab tools for automated workflows

  3. 5+ years of experience with Linux systems and server systems management

  4. 5+ years of experience with some of the following modules/domains: Serdes, characterization, emulation, logic design, microarchitecture, validation, embedded programming

  5. 3+ years of experience with embedded systems’ architecture and components, performance optimization of algorithms, test automation, and instrument communication (osciloscopes, analyzers, traffic generators, etc.)

  6. Experience in debugging tools for systems-on-chip (SoCs) - eg. JTAG, GDB, Trace32

  7. Knowledge of common bus protocols such as I2C, SPI, USB, and/or PCIe.

  8. Knowledge of of ASIC design flow, ASIC prototyping flow, and similar.

  9. Experience with Tool Chains: VCS, Palladium, Protium, Zebu, Veloce, Cadence, Mentor, Synopsys

Public Compensation:

$163,000/year to $225,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.

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